Freescale-semiconductor DSP56366 User Manual

Document Number: DSP56366UMRev. 408/2006DSP56366 24-Bit Digital SignalProcessorUser Manual

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-8 Freescale Semiconductor 8.3.11 ESAI Time Slot Register (TSR) . . . . . . . . . . . . . . . . .

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-6 Freescale Semiconductor The eight host processor re

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-7 NOTEWhen writing data to a

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-8 Freescale Semiconductor 6.5.3.4 HCR Host Flags 2,3

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-9 If HDM1 or HDM0 are set, th

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-10 Freescale Semiconductor for the DMA controller to

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-11 by the HDI08 hardware when

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-12 Freescale Semiconductor 6.5.5.2 HBAR Reserved Bits

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-13 6.5.6.2 HPCR Host Address

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-14 Freescale Semiconductor 6.5.6.9 HPCR Host Request

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-15 Figure 6-8 Dual strobes b

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-9 9.3.4.3 RCCR_1 Rx High Freq. Clock Direction (RHCKD) - Bit 23 . . . . .

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-16 Freescale Semiconductor 6.5.8 Host Data Register (

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-17 6.5.10 Host Interface DSP

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-18 Freescale Semiconductor Figure 6-11 HSR-HCR

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-19 One of the most innov

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-20 Freescale Semiconductor 6.6.1.1 ICR Receive R

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-21 6.6.1.3 ICR Double Ho

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-22 Freescale Semiconductor 6.6.1.6 ICR Host Litt

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-23 from the host request

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-24 Freescale Semiconductor The host processor ca

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-25 written by the host p

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-10 Freescale Semiconductor 10.5.7.2 DAX Transmit Underrun Error Flag (XAUR)—Bit 1 . . . . . . . .

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-26 Freescale Semiconductor 6.6.4 Interrupt Vecto

HDI08 – External Host Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-27 6.6.7 Host Side Regis

Servicing The Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-28 Freescale Semiconductor 6.7 Servicing The Host InterfaceT

Servicing The Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-29 Figure 6-16 HDI08 Host Request S

Servicing The Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-30 Freescale Semiconductor

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-1 7 Serial Host Interface7.1 IntroductionThe Serial Host Interfa

Serial Host Interface Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-2 Freescale Semiconductor 7.2 Serial Host Int

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-3 user’s responsibility t

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-4 Freescale Semiconductor Figure 7-4 SHI Program

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-5 The SHI interrupt vecto

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-11 11.3.4.12 TCSR Timer Compare Flag (TCF) Bit 21 . . . . . . . . . . . .

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-6 Freescale Semiconductor Figure 7-5 SHI I/O Shi

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-7 7.4.4.1 HSAR Reserved B

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-8 Freescale Semiconductor Figure 7-6 SPI Data-To

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-9 When the SHI is in mast

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-10 Freescale Semiconductor When HFM[1:0] = 00, th

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-11 7.4.6.1.1 SHI Individu

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-12 Freescale Semiconductor It is recommended that

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-13 7.4.6.8 HCSR Idle (HID

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-14 Freescale Semiconductor transmit-underrun-erro

Serial Host Interface Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-15 If a transmit interrup

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-12 Freescale Semiconductor B.4 Interrupt Source Priorities (within an IPL) . . . . . . . . . . .

Characteristics Of The SPI BusDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-16 Freescale Semiconductor 7.4.6.18 Host Bus Error (HBER)—

Characteristics Of The I2C BusDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-17 7.6.1 OverviewThe I2C bus proto

Characteristics Of The I2C BusDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-18 Freescale Semiconductor Figure 7-9 Acknowledgment on t

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-19 Figure 7-11 I2C Bus Protocol F

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-20 Freescale Semiconductor If a write to HTX occurs, its c

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-21 It is recommended that an SHI i

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-22 Freescale Semiconductor In a receive session, only the

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-23 may be used to interrupt the ex

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-24 Freescale Semiconductor the HREQ line between two SHI-e

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 7-25 7.7.5 SHI Operation During DSP

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor LOF-1 Figure 1-1 DSP56366 Block Diagram . . . . . . . . . . . . . . . . . . .

SHI Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 47-26 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-1 8 Enhanced Serial AUDIO Interface (ESAI)8.1 IntroductionThe En

IntroductionDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-2 Freescale Semiconductor Figure 8-1 ESAI Block DiagramSDO1 [PC10]SDO0 [PC1

ESAI Data and Control PinsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-3 8.2 ESAI Data and Control PinsThree

ESAI Data and Control PinsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-4 Freescale Semiconductor 8.2.4 Serial Transmit 3/Receive 2 Da

ESAI Data and Control PinsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-5 When this pin is configured as seria

ESAI Data and Control PinsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-6 Freescale Semiconductor SCKT may be programmed as a general-

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-7 8.2.10 Frame Sync for Transmitter (FST)F

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-8 Freescale Semiconductor special-purpose time slot register. The

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-9 Figure 8-3 ESAI Clock Generator Functio

DSP56366 24-Bit Digital Signal Processor, Rev. 4LOF-2 Freescale Semiconductor Figure 7-4 SHI Programming Model—DSP Side . . . . . . . . . . . . . . .

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-10 Freescale Semiconductor operational (see Figure 8-3). The maxim

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-11 Figure 8-4 ESAI Frame Sync Generator F

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-12 Freescale Semiconductor 8.3.1.5 TCCR Transmit Clock Polarity (T

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-13 .Hardware and software reset clear all

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-14 Freescale Semiconductor 8.3.2.3 TCR ESAI Transmit 2 Enable (TE2

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-15 The SDO4/SDI1 pin is the data input pin

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-16 Freescale Semiconductor 2. If the data word is right-aligned (T

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-17 Figure 8-6 Normal and Network Operatio

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-18 Freescale Semiconductor 8.3.2.10 TCR Tx Slot and Word Length Se

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-19 8.3.2.11 TCR Transmit Frame Sync Length

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor LOF-3 Figure 9-11 TSMA_1 Register . . . . . . . . . . . . . . . . . . . . .

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-20 Freescale Semiconductor Figure 8-7 Frame Length SelectionDATA

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-21 8.3.2.12 TCR Transmit Frame Sync Relati

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-22 Freescale Semiconductor 8.3.2.17 TCR Transmit Even Slot Data In

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-23 Hardware and software reset clear all t

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-24 Freescale Semiconductor 8.3.3.5 RCCR Receiver Clock Polarity (R

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-25 In the synchronous mode when RCKD is se

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-26 Freescale Semiconductor 8.3.3.10 RCCR Receiver High Frequency C

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-27 8.3.4.1 RCR ESAI Receiver 0 Enable (RE0

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-28 Freescale Semiconductor 8.3.4.7 RCR Receiver Word Alignment Con

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-29 Table 8-11 ESAI Receive Slot and Word

DSP56366 24-Bit Digital Signal Processor, Rev. 4LOF-4 Freescale Semiconductor Figure D-20 ESAI Status Register . . . . . . . . . . . . . . . . . . .

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-30 Freescale Semiconductor 8.3.4.10 RCR Receiver Frame Sync Length

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-31 8.3.4.13 RCR Receive Exception Interrup

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-32 Freescale Semiconductor Hardware and software reset clear all

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-33 the transmit and receive sections. When

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-34 Freescale Semiconductor Figure 8-11 SAICR SYN Bit Operation8.3

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-35 8.3.6.1 SAISR Serial Input Flag 0 (IF0

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-36 Freescale Semiconductor a word is received, it indicates (only

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-37 during the second time slot in the fram

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-38 Freescale Semiconductor TSR disabled time slot period in networ

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-39 Figure 8-14 ESAI Data Path Programming

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor LOT-1 Table 2-1 DSP56364 Functional Signal Groupings . . . . . . . . . . . . .

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-40 Freescale Semiconductor 8.3.7 ESAI Receive Shift RegistersThe r

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-41 transmitter empty condition (TDE=1), or

ESAI Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-42 Freescale Semiconductor NOTEWhen operating in normal mode, bit

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-43 NOTEWhen operating in normal mode, bit 0 of th

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-44 Freescale Semiconductor 8.4.3 ESAI Interrupt RequestsThe ESAI can gene

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-45 8. ESAI Transmit DataOccurs when the transmit

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-46 Freescale Semiconductor Data clock and frame sync signals can be gener

GPIO - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-47 RCCR and SAICR registers.The output

GPIO - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-48 Freescale Semiconductor 8.5.3 Port C Data register (PDRC)The

ESAI Initialization ExamplesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 8-49 8.6 ESAI Initialization Examples8

How to Reach Us:Home Page:www.freescale.comE-mail:[email protected]/Europe or Locations Not Listed:Freescale SemiconductorTechnical Informati

DSP56366 24-Bit Digital Signal Processor, Rev. 4LOT-2 Freescale Semiconductor Table 6-12 Host Mode Bit Definition . . . . . . . . . . . . . . . . .

ESAI Initialization ExamplesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 48-50 Freescale Semiconductor • Configure the control registers

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-1 9 Enhanced Serial Audio Interface 1 (ESAI_1)9.1 IntroductionTh

IntroductionDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-2 Freescale Semiconductor Figure 9-1 ESAI_1 Block DiagramClock / Frame Sync

ESAI_1 Data and Control PinsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-3 9.2 ESAI_1 Data and Control PinsTh

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-4 Freescale Semiconductor 9.2.6 Serial Transmit 5/Receive 0 Data

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-5 The ESAI_1 also contains the GPIO Port

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-6 Freescale Semiconductor 9.3.2.1 TCCR_1 Tx High Freq. Clock Div

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-7 Figure 9-4 ESAI_1 Clock Generator Fun

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-8 Freescale Semiconductor Figure 9-5 ESAI_1 Frame Sync Generato

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-9 9.3.4 ESAI_1 Receive Clock Control Reg

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor i PrefaceThis manual describes the DSP56366 24-bit digital signal

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-10 Freescale Semiconductor 9.3.5 ESAI_1 Receive Control Register

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-11 9.3.8 ESAI_1 Receive Shift RegistersT

ESAI_1 Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-12 Freescale Semiconductor 9.3.12 ESAI_1 Time Slot Register (TSR

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-13 9.4 Operating Modes9.4.1 ESAI_1 After ResetHar

GPIO - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-14 Freescale Semiconductor 9.5.2 Port E Direction Register (PRR

GPIO - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 9-15 11109876543210Y:$FFFF9D PD11 PD10 PD

GPIO - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 49-16 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-1 10 Digital Audio Transmitter10.1 IntroductionThe Digital Audi

DAX SignalsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-2 Freescale Semiconductor Figure 10-1 Digital Audio Transmitter (DAX) Block

DAX Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-3 • Parity generator (PRTYG)• Preamble gen

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4ii Freescale Semiconductor SECTION 6— HOST INTERFACE (HDI08)• Describes the HDI08 parallel

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-4 Freescale Semiconductor 10.5 DAX Internal ArchitectureHardwa

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-5 10.5.1 DAX Audio Data Register (XADR

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-6 Freescale Semiconductor 10.5.4.2 DAX Channel A User Data (XU

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-7 10.5.6.1 Audio Data Register Empty I

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-8 Freescale Semiconductor 10.5.7.1 DAX Audio Data Register Emp

DAX Internal ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-9 10.5.8 DAX Parity Generator (PRTYG)T

DAX Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-10 Freescale Semiconductor • The internal DSP core clock—

DAX Programming ConsiderationsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-11 non-audio data bits of the nex

GPIO (PORT D) - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-12 Freescale Semiconductor Figure 10-6 Examples of d

GPIO (PORT D) - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 10-13 10.7.2 Port D Direction Re

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor iii • The word “assert” means that a high true (active high) signa

GPIO (PORT D) - Pins and RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 410-14 Freescale Semiconductor 10.7.3 Port D Data Registe

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-1 11 Timer/ Event Counter11.1 IntroductionThis section describe

Timer/Event Counter ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-2 Freescale Semiconductor 11.2.2 Individual Timer Block

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-3 11.3 Timer/Event Counter

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-4 Freescale Semiconductor Figure 11-3 Timer Modul

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-5 11.3.1 Prescaler Counter

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-6 Freescale Semiconductor 11.3.2.3 TPLR Reserved B

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-7 Clearing the TE bit disa

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-8 Freescale Semiconductor Table 11-2 Timer Contr

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-9 11.3.4.5 TCSR Inverter (

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4iv Freescale Semiconductor NOTES

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-10 Freescale Semiconductor NOTEThe INV bit affects

Timer/Event Counter Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-11 The DO bit is cleared b

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-12 Freescale Semiconductor 11.3.5 Timer Load Register (TLR)The

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-13 — Event counter, mode 3: Internal ti

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-14 Freescale Semiconductor 11.4.1.2 Timer Pulse (Mode 1)In this

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-15 When the counter value matches the v

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-16 Freescale Semiconductor 11.4.2 Signal Measurement ModesThe f

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-17 11.4.2.3 Measurement Input Period (M

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-18 Freescale Semiconductor clock signal can be taken from eithe

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-19 The duty cycle of the TIO0 signal is

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 1-1 1 DSP56366 Overview1.1 IntroductionThis manual describes the D

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-20 Freescale Semiconductor 11.4.4.2 Watchdog Toggle (Mode 10)In

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 11-21 11.4.6.2 Timer Behavior during StopD

Timer Modes of OperationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 411-22 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-1 Appendix A Bootstrap ROM ContentsA.1 DSP56366 Bootstrap Progra

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-2 Freescale Semiconductor ; Program ROM, without loading the P

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-3 ; The HOST 8051 bootstrap code expec

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-4 Freescale Semiconductor ;;;;;;;;;;;;;;;;;;;;;; DSP I/O REGIS

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-5 SHILD; This is the routine which loa

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-6 Freescale Semiconductor ; MD:MC:MB:MA=0001EPROMLD mov

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-7 ; E - i8051 - Dual strobes

DSP56300 Core DescriptionDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 41-2 Freescale Semiconductor 1.2 DSP56300 Core DescriptionThe DSP5

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-8 Freescale Semiconductor ;

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-9 ; HR

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-10 Freescale Semiconductor ;==========================

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-11

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-12 Freescale Semiconductor move y:(r0)+,a1

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor A-13 BURN_END ORG PL:,PL:

DSP56366 Bootstrap ProgramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4A-14 Freescale Semiconductor move x0,x:(r0)+

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-1 Appendix B Equates;*******************************************

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-2 Freescale Semiconductor ;------------------------------------------------------

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-3 I_ESAIRLS EQU I_VEC+$36 ; ESAI Receive Last SlotI_E

DSP56366 Audio Processor ArchitectureDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 1-3 — Off-chip expansion up t

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-4 Freescale Semiconductor I_HI08TX EQU I_VEC+$62 ; Host Transmit Data EmptyI_H

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-5 ;; EQUATES for I/O Port Programming;;------------

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-6 Freescale Semiconductor M_IAL1 EQU 1 ; IRQA Mode Interrupt

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-7 M_D4L0 EQU 20 ; DMA4 Interrupt Prior

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-8 Freescale Semiconductor ;------------------------------------------------------

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-9 M_DCR3 EQU $FFFFE0 ; DMA3 Control Registe

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-10 Freescale Semiconductor M_DRS1 EQU 12 ;DMA Request Sour

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-11 ;-----------------------------------------------------

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-12 Freescale Semiconductor M_PEN EQU 18 ; PLL Enable BitM_COD

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-13 M_BA1W EQU $3E0 ; Area 1 Wait Control

DSP56300 Core Functional BlocksDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 41-4 Freescale Semiconductor • Instruction cache controller•

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-14 Freescale Semiconductor M_BRW0 EQU 2 ;Out of Page Wait Stat

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-15 M_BAM EQU 6 ; Address MuxingM_BPA

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-16 Freescale Semiconductor M_S EQU 7 ; Scaling BitM_I0

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-17 M_BE EQU 10 ; Burst EnableM_TAS

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-18 Freescale Semiconductor M_XBLK EQU 2 ; DAX Block Transferr

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-19 ; HSAR bitsM_HA6 EQU 23 ; SH

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-20 Freescale Semiconductor ; control bits in HCKRM_HFM1 EQU 13

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-21 M_RCR_1 EQU $FFFF97 ; ESAI_1 Receive Cont

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-22 Freescale Semiconductor M_RCR EQU $FFFFB7 ; ESAI Receive Contro

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-23 M_RS21 EQU 5 ; ESAIM_RS20 EQU

DSP56300 Core Functional BlocksDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 1-5 the A or B accumulator. A 56-bi

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-24 Freescale Semiconductor M_TS27 EQU 11 ; ESAIM_TS26 EQU

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-25 M_TS1 EQU 1 ; ESAIM_TS0 EQU

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-26 Freescale Semiconductor M_RPM1 EQU 1 ; ESAIM_RPM0 EQU

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-27 M_THCKD EQU 23 ; ESAIM_TFSD EQU

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-28 Freescale Semiconductor M_TLIE EQU 23 ; ESAIM_TIE EQU

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-29 M_ALC EQU 8 ;ESAIM_TEBE EQU 7

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-30 Freescale Semiconductor M_HORX EQU $FFFFC6 ; HOST Receive Regis

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-31 M_HCSEN EQU $3 ; HOST Chip Select En

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-32 Freescale Semiconductor M_TCSR0 EQU $FFFF8F ; TIMER0 Control/Stat

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor B-33 M_TOF EQU 20 ; Timer Overflow Flag

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-1 1 DSP56366 Overview . . . . . . . . . . . . . . . . . . . . . . . . .

DSP56300 Core Functional BlocksDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 41-6 Freescale Semiconductor • Nested hardware DO loops • Fa

EquatesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4B-34 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor C-1 Appendix C JTAG BSDL-- FILENAME : 56366TQFP_revA.bsdl-- -- M

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4C-2 Freescale Semiconductor CAS_:out bit; EXTAL:in bit; CVCC:li

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor C-3 "QVCCH: (20, 49, 95), " &

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4C-4 Freescale Semiconductor attribute INSTRUCTION_OPCODE of DSP56366 : entity is

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor C-5 "28 (BC_1, *, control, 1),&qu

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4C-6 Freescale Semiconductor "80 (BC_1, RESET_, input, X),&qu

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor C-7 "133 (BC_1, *, control, 1),&qu

JTAG BSDLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4C-8 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-1 Appendix D Programmer’s ReferenceD.1 IntroductionThis section

DSP56300 Core Functional BlocksDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 1-7 • End-of-block-transfer interru

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-2 Freescale Semiconductor Table D-1. Internal I/O Memory MapPerip

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-3 DMA4 X:$FFFFDF DMA SOURCE ADDRESS REGIS

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-4 Freescale Semiconductor ESAI X:$FFFFBC ESAI RECEIVE SLOT MASK R

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-5 X:$FFFF99 ReservedX:$FFFF98 ReservedX:$

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-6 Freescale Semiconductor Y:$FFFFA7 ReservedY:$FFFFA6 ReservedY:$

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-7 ESAI_1 Y:$FFFF9C ESAI_1 RECEIVE SLOT MA

Interrupt Vector AddressesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-8 Freescale Semiconductor D.3 Interrupt Vector AddressesTable

Interrupt Vector AddressesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-9 VBA:$42 0 - 2 SHI Transmit Underrun

Interrupt Source Priorities (within an IPL)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-10 Freescale Semiconductor D.4 Interrupt Sour

Interrupt Source Priorities (within an IPL)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-11 HOST Transmit Data

Peripheral OverviewDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 41-8 Freescale Semiconductor ALU. Memory space includes internal RAM and

Host Interface—Quick ReferenceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-12 Freescale Semiconductor D.5 Host Interface—Quick Refere

Host Interface—Quick ReferenceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-13 HPCR 0 HGEN Host GPIO Enable 01

Host Interface—Quick ReferenceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-14 Freescale Semiconductor HSR 0 HRDF Host Receive Data Fu

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-15 D.6 Programming SheetsThe worksheets shown

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-16 Freescale Semiconductor Figure D-1. Status Register (SR)Application

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-17 Figure D-2. Operating Mode Register (OMR)Ch

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-18 Freescale Semiconductor Figure D-3. Interrupt Priority Register–Cor

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-19 Figure D-4. Interrupt Priority Register – P

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-20 Freescale Semiconductor Figure D-5. Phase Lock Loop Control Registe

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-21 Figure D-6. Host Receive and Host Transmit

Peripheral OverviewDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 1-9 1.5.1 Host Interface (HDI08)The host interf

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-22 Freescale Semiconductor Figure D-7. Host Control and Status Registe

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-23 Figure D-8. Host Base Address and Host Port

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-24 Freescale Semiconductor Figure D-9. Host Interrupt Control and Inte

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-25 Figure D-10. Host Interrupt Vector and Comm

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-26 Freescale Semiconductor Figure D-11. Host Receive and Transmit Byte

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-27 Figure D-12. SHI Slave Address and Clock Co

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-28 Freescale Semiconductor Figure D-13. SHI Transmit and Receive Data

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-29 Figure D-14. SHI Host Control/Status Regist

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-30 Freescale Semiconductor Figure D-15. ESAI Transmit Clock Control Re

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-31 Figure D-16. ESAI Transmit Control Register

Peripheral OverviewDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 41-10 Freescale Semiconductor 1.5.4 Enhanced Serial Audio Interface (ESA

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-32 Freescale Semiconductor Figure D-17. ESAI Receive Clock Control Reg

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-33 Figure D-18. ESAI Receive Control Register1

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-34 Freescale Semiconductor Figure D-19. ESAI Common Control Register15

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-35 Figure D-20. ESAI Status Register15 65419 1

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-36 Freescale Semiconductor Figure D-21. ESAI_1 Multiplex Control Regis

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-37 Figure D-22. ESAI_1 Transmit Clock Control

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-38 Freescale Semiconductor Figure D-23. ESAI_1 Transmit Control Regist

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-39 Figure D-24. ESAI_1 Receive Clock Control R

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-40 Freescale Semiconductor Figure D-25. ESAI_1 Receive Control Registe

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-41 Figure D-26. ESAI_1 Common Control Register

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-1 2 Signal/Connection Descriptions2.1 Signal GroupingsThe input

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-42 Freescale Semiconductor Figure D-27. ESAI_1 Status Register15 65419

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-43 Figure D-28. DAX Non-Audio Data RegisterDAX

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-44 Freescale Semiconductor Figure D-29. DAX Control and Status Registe

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-45 Figure D-30. Timer Prescaler Load and Presc

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-46 Freescale Semiconductor Figure D-31. Timer Control/Status RegisterN

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-47 Figure D-32. Timer Load, Compare and Count

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-48 Freescale Semiconductor Figure D-33. GPIO Port BApplication:Date:Pr

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-49 Figure D-34. GPIO Port CApplication:Date:Pr

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-50 Freescale Semiconductor Figure D-35. GPIO Port DApplication:Date:Pr

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor D-51 Figure D-36. GPIO Port EApplication:Date:Pr

Signal GroupingsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-2 Freescale Semiconductor Figure 2-1 Signals Identified by Functional G

Programming SheetsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4D-52 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor Index-1 IndexNumerics5 V tolerance 1Aaddermodulo 5offset 5reverse-carry 5addre

DSP56366 24-Bit Digital Signal Processor, Rev. 4Index-2 Freescale Semiconductor triggered by timer 21DO bit 10DO loop 6DRAM 8DSP56300 core 2DSP56300 F

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor Index-3 Transmit Data In Master Mode 24Transmit Data In Slave Mode 22I2C Bus A

DSP56366 24-Bit Digital Signal Processor, Rev. 4Index-4 Freescale Semiconductor Rreserved bitsin TCSR registerbits 3, 10, 14, 16–19, 22, 23 11in TPCR

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor Index-5 TC0–TC3 bits 7TCF 11TCIE bit 7TCPR 12TCR 12TCSR register 6bit 0—Timer

DSP56366 24-Bit Digital Signal Processor, Rev. 4Index-6 Freescale Semiconductor

PowerDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-3 2.2 Power2.3 GroundTable 2-2 Power InputsPower Name Des

Clock and PLLDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-4 Freescale Semiconductor 2.4 Clock and PLLGNDA (4) Address Bus Ground — GN

External Memory Expansion Port (Port A)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-5 2.5 External Memory Exp

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-2 Freescale Semiconductor 3.1 Data and Program Memory Maps . . . . . . . . . . . . . . . . . . .

External Memory Expansion Port (Port A)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-6 Freescale Semiconductor WROutput Tri-stated Wri

Interrupt and Mode ControlDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-7 2.6 Interrupt and Mode ControlThe in

Interrupt and Mode ControlDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-8 Freescale Semiconductor Table 2-8 Interrupt and Mode Contr

PARALLEL HOST INTERFACE (HDI08)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-9 2.7 PARALLEL HOST INTERFACE (HD

PARALLEL HOST INTERFACE (HDI08)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-10 Freescale Semiconductor HA2 Input GPIO disconnectedHos

PARALLEL HOST INTERFACE (HDI08)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-11 HCS Input GPIO disconnectedHos

Serial Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-12 Freescale Semiconductor 2.8 Serial Host Interface The SHI has fi

Serial Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-13 MISO Input or output Tri-stated SPI Mast

Serial Host InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-14 Freescale Semiconductor SSInput Tri-stated SPI Slave Select — Th

Enhanced Serial Audio InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-15 2.9 Enhanced Serial Audio Inte

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-3 6.5.1 Host Receive Data Register (HORX) . . . . . . . . . . . . . . .

Enhanced Serial Audio InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-16 Freescale Semiconductor FST Input or output GPIO disco

Enhanced Serial Audio InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-17 SDO5 Output GPIO disconnectedS

Enhanced Serial Audio InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-18 Freescale Semiconductor SDO2/SDO2_1Output GPIO disconn

Enhanced Serial Audio Interface_1DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-19 2.10 Enhanced Serial Audio I

Enhanced Serial Audio Interface_1DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-20 Freescale Semiconductor SCKR_1 Input or output GPIO

SPDIF Transmitter Digital Audio InterfaceDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 2-21 2.11 SPDIF Transmitt

TimerDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 42-22 Freescale Semiconductor 2.12 Timer 2.13 JTAG/OnCE InterfaceTable 2-14 Timer Si

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-1 3 Memory Configuration3.1 Data and Program Memory MapsThe on-c

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-2 Freescale Semiconductor Table 3-2 On-chip RAM Memory Loc

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-3 Figure 3-1 Memory Maps for MSW=(X

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-4 Freescale Semiconductor 6.6.1.4 ICR Host Flag 0 (HF0) Bit 3 . . . . . . . . . . . . . . . . . .

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-4 Freescale Semiconductor Figure 3-3 Memory Maps for MSW=(0

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-5 Figure 3-5 Memory Maps for MSW=(1

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-6 Freescale Semiconductor Figure 3-7 Memory Maps for MSW=(0

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-7 Figure 3-9 Memory Maps for MSW=(X

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-8 Freescale Semiconductor Figure 3-11 Memory Maps for MSW=(

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-9 Figure 3-13 Memory Maps for MSW=(

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-10 Freescale Semiconductor Figure 3-15 Memory Maps for MSW=

Data and Program Memory MapsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-11 3.1.1 Reserved Memory SpacesThe r

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-12 Freescale Semiconductor while the DSP is in Debug mode. As a r

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-13 DMA1 X:$FFFFEB DMA SOURCE ADDRESS REGI

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-5 7.4.6.2 HCSR I2C/SPI Selection (HI2C)—Bit 1 . . . . . . . . . . . . . .

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-14 Freescale Semiconductor HDI08 X:$FFFFC7 HOST TRANSMIT REGISTER

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-15 ESAI X:$FFFFBC ESAI RECEIVE SLOT MASK

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-16 Freescale Semiconductor X:$FFFF97 ReservedX:$FFFF96 ReservedX:

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 3-17 Y:$FFFFAC ReservedY:$FFFFAB ReservedY:

Internal I/O Memory MapDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 43-18 Freescale Semiconductor ESAI_1 Y:$FFFF9C ESAI_1 RECEIVE SLOT M

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-1 4 Core Configuration4.1 IntroductionThis chapter contains DSP5

Operating Mode Register (OMR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-2 Freescale Semiconductor 4.2.1 Asynchronous Bus Arbitratio

Operating Mode Register (OMR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-3 The Instruction Cache should be i

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-4 Freescale Semiconductor ;do #(PATCH_DATA_END-PATCH_DATA_START+1),PATCH_

Operating ModesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-5 60110$FF0000Bootstrap from SHI (slave I2C mode)

DSP56366 24-Bit Digital Signal Processor, Rev. 4TOC-6 Freescale Semiconductor 8.2.10 Frame Sync for Transmitter (FST) . . . . . . . . . . . . . . .

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-6 Freescale Semiconductor 4.4 Interrupt Priority RegistersTh

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-7 Figure 4-1 Interrupt Priority Reg

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-8 Freescale Semiconductor Table 4-5 Interrupt Sources Prio

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-9 SHI Receive FIFO FullSHI Transmit

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-10 Freescale Semiconductor Table 4-6 DSP56366 Interrupt Ve

Interrupt Priority RegistersDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-11 VBA:$44 0 - 2 SHI Receive FIFO No

DMA Request SourcesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-12 Freescale Semiconductor 4.5 DMA Request SourcesThe DMA Request Sou

PLL InitializationDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-13 4.6 PLL Initialization4.6.1 PLL Multiplicat

JTAG Boundary Scan Register (BSR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-14 Freescale Semiconductor 4.9 JTAG Boundary Scan Regis

JTAG Boundary Scan Register (BSR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-15 17 D13 Input/Output Data 93

DSP56366 24-Bit Digital Signal Processor, Rev. 4Freescale Semiconductor TOC-7 8.3.3.10 RCCR Receiver High Frequency Clock Direction (RHCKD) - Bit 23

JTAG Boundary Scan Register (BSR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-16 Freescale Semiconductor 43 A7 Output3 Data119 HSCKR

JTAG Boundary Scan Register (BSR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 4-17 69 EXTAL Input Data 145 SS I

JTAG Boundary Scan Register (BSR)DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 44-18 Freescale Semiconductor NOTES

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 5-1 5 General Purpose Input/Output5.1 IntroductionThe DSP56362 pro

Programming ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 45-2 Freescale Semiconductor 5.2.4 Port E Signals and RegistersPort E has

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-1 6 Host Interface (HDI08)6.1 IntroductionThe host interface (HD

HDI08 FeaturesDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-2 Freescale Semiconductor — Bit addressing instructions (e.g. BCHG, BCLR,

HDI08 Host Port SignalsDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-3 — Cycle-stealing DMA with initializatio

HDI08 Block DiagramDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 46-4 Freescale Semiconductor 6.4 HDI08 Block DiagramFigure 6-1 shows the

HDI08 – DSP-Side Programmer’s ModelDSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4Freescale Semiconductor 6-5 Figure 6-1 HDI08 Block Dia