Freescale Semiconductor EETX4K User Manual Page 1

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Block Guide — S12EETX4KV0 V00.0410 Freescale Semiconductor, I Freescale Semiconductor, Inc.For More

Block Guide — S12EETX4KV0 V00.0411Section 1 Introduction1.1 OverviewThis document describes the EETX4K module which includes a 4K byte EEPROM (Non-V

Block Guide — S12EETX4KV0 V00.04121.4 Block DiagramA block diagram of the EEPROM module is shown in Figure 1-1.Figure 1-1 Module Block DiagramEETX4K

Block Guide — S12EETX4KV0 V00.0413Section 2 External Signal Description2.1 OverviewThe EEPROM module contains no signals that connect off-chip.

Block Guide — S12EETX4KV0 V00.0414Section 3 Memory Map and Registers3.1 OverviewThis section describes the memory map and registers for the EEPROM m

Block Guide — S12EETX4KV0 V00.0415Figure 3-1 EEPROM Memory MapEEPROM RegistersADDRESS OFFSET = $_00EEPROM Configuration FieldADDRESS OFFSET = $_0BEEPR

Block Guide — S12EETX4KV0 V00.0416The EEPROM module also contains a set of 12 control and status registers located between EEPROMregister address offs

Block Guide — S12EETX4KV0 V00.04173.3 Register Descriptions3.3.1 ECLKDIV — EEPROM Clock Divider RegisterThe ECLKDIV register is used to control time

Block Guide — S12EETX4KV0 V00.04183.3.3 RESERVED2This register is reserved for factory testing and is not accessible.Figure 3-4 RESERVED2All bits rea

Block Guide — S12EETX4KV0 V00.04193.3.5 EPROT — EEPROM Protection RegisterThe EPROT register defines which EEPROM sectors are protected against progr

Block Guide — S12EETX4KV0 V00.042Revision History Freescale Semiconductor, I Freescale Semiconducto

Block Guide — S12EETX4KV0 V00.04203.3.6 ESTAT — EEPROM Status RegisterThe ESTAT register defines the operational status of the module.Figure 3-7 EEP

Block Guide — S12EETX4KV0 V00.0421The CCIF flag indicates that there are no more commands pending. The CCIF flag is cleared whenCBEIF is clear and set

Block Guide — S12EETX4KV0 V00.0422Figure 3-8 EEPROM Command Register (ECMD)All CMDB bits are readable and writable during a command write sequence wh

Block Guide — S12EETX4KV0 V00.04233.3.9 EADDR — EEPROM Address RegistersThe EADDRHI and EADDRLO registers are the EEPROM address registers.Figure 3-10

Block Guide — S12EETX4KV0 V00.0424Figure 3-13 EEPROM Data Low Register (EDATALO)All EDHI and EDLO bits read zero and are not writable in normal modes

Block Guide — S12EETX4KV0 V00.0425Section 4 Functional Description4.1 EEPROM Command OperationsWrite and read operations are both used for the progr

Block Guide — S12EETX4KV0 V00.0426then 182kHz. In this case, the EEPROM program and erase algorithm timings are increased over theoptimum target by:NO

Block Guide — S12EETX4KV0 V00.0427Figure 4-1 Determination Procedure for PRDIV8 and EDIV BitsPRDIV8=1yesnoPRDIV8=0 (reset)12.8MHz?EECLK=(PRDCLK)/(1+E

Block Guide — S12EETX4KV0 V00.04284.1.2 Command Write SequenceThe EEPROM command controller is used to supervise the command write sequence to execut

Block Guide — S12EETX4KV0 V00.0429NOTE:The user should not program an EEPROM word without first erasing the sector inwhich that word resides.4.1.3.1

Block Guide — S12EETX4KV0 V00.043Table of ContentsSection 1 Introduction1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Block Guide — S12EETX4KV0 V00.0430Figure 4-2 Example Erase Verify Command Flow4.1.3.2 Program CommandThe program operation will program a previously

Block Guide — S12EETX4KV0 V00.04312. Write the program command, $20, to the ECMD register.3. Clear the CBEIF flag in the ESTAT register by writing a “

Block Guide — S12EETX4KV0 V00.0432Figure 4-3 Example Program Command Flow4.1.3.3 Sector Erase CommandThe sector erase operation will erase both words

Block Guide — S12EETX4KV0 V00.0433An example flow to execute the sector erase operation is shown in Figure 4-4. The sector erase commandwrite sequence

Block Guide — S12EETX4KV0 V00.0434Figure 4-4 Example Sector Erase Command Flow4.1.3.4 Mass Erase CommandThe mass erase operation will erase all addr

Block Guide — S12EETX4KV0 V00.0435If the EEPROM memory to be erased contains any protected area, the PVIOL flag in the ESTAT registerwill set and the

Block Guide — S12EETX4KV0 V00.04361. Write to any EEPROM memory address to start the command write sequence for the sector eraseabort command. The add

Block Guide — S12EETX4KV0 V00.0437Figure 4-6 Example Sector Erase Abort Command Flow4.1.3.6 Sector Modify CommandThe sector modify operation will er

Block Guide — S12EETX4KV0 V00.04382. Write the sector modify command, $60, to the ECMD register.3. Clear the CBEIF flag in the ESTAT register by writi

Block Guide — S12EETX4KV0 V00.04391. Writing to an EEPROM address before initializing the ECLKDIV register.2. Writing a byte or misaligned word to a v

Block Guide — S12EETX4KV0 V00.0444.4 Background Debug Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Block Guide — S12EETX4KV0 V00.04404.2 Wait ModeIf a command is active (CCIF=0) when the MCU enters the WAIT mode, the active command and anybuffered

Block Guide — S12EETX4KV0 V00.0441BDM status register. This BDM action will cause the MCU to override the Flash security state and theMCU will be unse

Block Guide — S12EETX4KV0 V00.0442Figure 4-8 EEPROM Interrupt ImplementationFor a detailed description of the register bits, refer to the EEPROM Conf

Block Guide — S12EETX4KV0 V00.0443Index–A–ACCERR 21–B–Background Debug Mode 40BLANK 21–C–CBEIE 18CBEIF 20CCIE 18CCIF 20CMDB 22Command Write Sequence 1

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Block Guide — S12EETX4KV0 V00.0445Block Guide End Sheet Freescale Semiconductor, I Freescale Semico

Block Guide — S12EETX4KV0 V00.0446FINAL PAGE OF46PAGES Freescale Semiconductor, I Freescale Semicon

Block Guide — S12EETX4KV0 V00.045List of FiguresFigure 1-1 Module Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Block Guide — S12EETX4KV0 V00.046 Freescale Semiconductor, I Freescale Semiconductor, Inc.For More

Block Guide — S12EETX4KV0 V00.047List of TablesTable 3-1 EEPROM Configuration Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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