Freescale Semiconductor MC68HC08KH12 User Manual

M68HC08Microcontrollersfreescale.comMC68HC08KH12Data SheetRev. 1.1MC68HC08KH12/HJuly 15, 2005

Advance Information MC68HC(7)08KH12 — Rev. 1.110 Freescale Semiconductor9.5.7 USB Embedded Device Control Register 2 (DCR2) . . . . .1469.5.8 USB Emb

Advance Information MC68HC(7)08KH12 — Rev. 1.1100 Freescale Semiconductor8.6 CGM RegistersThese registers control and monitor operation of the CGM:•

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor101 Table 8-2. CGM I/O Register SummaryAddr. Register Name Bit 7 6 5 4 3 2 1 Bit

Advance Information MC68HC(7)08KH12 — Rev. 1.1102 Freescale Semiconductor8.6.1 PLL Control Register (PCTL)The PLL control register contains the inter

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor103 PLLON — PLL On BitThis read/write bit activates the PLL and enables the VCO c

Advance Information MC68HC(7)08KH12 — Rev. 1.1104 Freescale Semiconductor8.6.2 PLL Bandwidth Control Register (PBWC)The PLL bandwidth control registe

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor105 logic zero and has no meaning. The write one function of this bit is reserved

Advance Information MC68HC(7)08KH12 — Rev. 1.1106 Freescale SemiconductorMUL[11:0] — Multiplier select bitsThese read/write bits control the modulo f

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor107 8.7 InterruptsWhen the AUTO bit is set in the PLL bandwidth control register

Advance Information MC68HC(7)08KH12 — Rev. 1.1108 Freescale Semiconductor8.8.2 CGM During Break InterruptsThe system integration module (SIM) control

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor109 Other systems refer to acquisition and lock times as the time the system take

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor11 11.6 Wait Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1110 Freescale SemiconductorThe most critical parameter which affects the reaction times of the PLL is t

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor111 8.9.3 Choosing a Filter CapacitorAs described in 8.9.2 Parametric Influences

Advance Information MC68HC(7)08KH12 — Rev. 1.1112 Freescale Semiconductoran initial frequency error, (fDES – fORIG)/fDES, of not more than ±100 perce

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor113 Advance Information — MC68HC(7)08KH12Section 9. Universal Serial Bus Module

Advance Information MC68HC(7)08KH12 — Rev. 1.1114 Freescale Semiconductor9.2 FeaturesFeatures of the general USB Module include the following:• Inte

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor115 Features of the embedded device function include the following:• Device Contr

Advance Information MC68HC(7)08KH12 — Rev. 1.1116 Freescale SemiconductorFigure 9-1. USB Block Diagram9.4 I/O Register Description of the HUB functi

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor117 Table 9-1. HUB Control Register SummaryAddr. Register Name Bit 7 6 5 4 3 2 1

Advance Information MC68HC(7)08KH12 — Rev. 1.1118 Freescale Semiconductor$005A UnimplementedRead:Write:Reset:$005BUSB HUB ControlRegister 0(HCR0)Read

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor119 Table 9-2. HUB Data Register SummaryAddr. Register Name Bit 7 6 5 4 3 2 1 Bit

Advance Information MC68HC(7)08KH12 — Rev. 1.112 Freescale Semiconductor12.8.1 Port F Data Register (PTF) . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1120 Freescale Semiconductor9.4.1 USB HUB Root Port Control Register (HRPCR)RESUM0 — Force Resume to the

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor121 EOF2 is generated by KH12 every millisecond, if SOF is not detected when thre

Advance Information MC68HC(7)08KH12 — Rev. 1.1122 Freescale Semiconductorbit can be set to 1 by the host request only. It can be cleared either by ha

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor123 SUSP1-SUSP4 — Downstream Port Selective Suspend BitThis read/write bit forces

Advance Information MC68HC(7)08KH12 — Rev. 1.1124 Freescale SemiconductorSOFF — Start Of Frame Detect FlagThis read only bit is set when a valid SOF

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor125 SOFIE — Start Of Frame Interrupt EnableThis read/write bit enables the Start

Advance Information MC68HC(7)08KH12 — Rev. 1.1126 Freescale SemiconductorRSTF — USB Reset FlagThis read only bit is set when a valid reset signal sta

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor127 9.4.5 USB HUB Address Register (HADDR)USBEN — USB Module EnableThis read/writ

Advance Information MC68HC(7)08KH12 — Rev. 1.1128 Freescale Semiconductor9.4.6 USB HUB Interrupt Register 0 (HIR0)TXDF — HUB Endpoint 0 Data Transmit

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor129 TXDIE — HUB Endpoint 0 Transmit Interrupt EnableThis read/write bit enables t

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor13 14.4.1 IRQ1/VPP Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1130 Freescale SemiconductorTSEQ — HUB Endpoint 0 Transmit Sequence BitThis read/write bit determines wh

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor131 TPSIZ3-TPSIZ0 — HUB Endpoint 0 Transmit Data Packet SizeThese read/write bits

Advance Information MC68HC(7)08KH12 — Rev. 1.1132 Freescale SemiconductorPCHG5-PCHG0 — HUB and Port Status Change BitsThese read/write bits report th

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor133 RSEQ — HUB Endpoint 0 Receive Sequence BitThis read only bit indicates the ty

Advance Information MC68HC(7)08KH12 — Rev. 1.1134 Freescale Semiconductor9.4.10 USB HUB Endpoint 0 Data Registers 0-7 (HE0D0-HE0D7)HE0Rx7-HE0Rx0 — HU

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor135 Table 9-3. Embedded Device Control Register SummaryAddr. Register Name Bit 7

Advance Information MC68HC(7)08KH12 — Rev. 1.1136 Freescale SemiconductorTable 9-4. Embedded Device Data Register SummaryAddr. Register Name Bit 7 6

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor137 $0028USB Embedded DeviceEndpoint 1/2 Data Register 0(DE1D0)Read:Write: DE1T07

Advance Information MC68HC(7)08KH12 — Rev. 1.1138 Freescale Semiconductor9.5.1 USB Embedded Device Address Register (DADDR)DEVEN — Enable USB Embedde

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor139 TXD0F — Embedded Device Endpoint 0 Data Transmit FlagThis read only bit is se

Advance Information MC68HC(7)08KH12 — Rev. 1.114 Freescale SemiconductorSection 16. Break Module (BREAK)16.1 Contents . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1140 Freescale Semiconductor1 = Receive Embedded Device Endpoint 0 can generate a CPU interrupt request0

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor141 1 = Transmit on Endpoint 1 or Endpoint 2 of the embedded device has occurred0

Advance Information MC68HC(7)08KH12 — Rev. 1.1142 Freescale Semiconductor1 = DATA1 Token active for next embedded device Endpoint 0 transmit0 = DATA0

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor143 TP0SIZ3-TP0SIZ0 — Embedded Device Endpoint 0 Transmit Data Packet SizeThese r

Advance Information MC68HC(7)08KH12 — Rev. 1.1144 Freescale Semiconductor1 = The data buffers are used for embedded device Endpoint 20 = The data buf

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor145 DRSEQ — Embedded Device Endpoint 0 Receive Sequence BitThis read only bit ind

Advance Information MC68HC(7)08KH12 — Rev. 1.1146 Freescale Semiconductor9.5.7 USB Embedded Device Control Register 2 (DCR2)ENABLE2 — Embedded Device

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor147 DSTALL1 — Embedded Device Endpoint 1 Force Stall BitThis read/write bit cause

Advance Information MC68HC(7)08KH12 — Rev. 1.1148 Freescale Semiconductor9.5.9 USB Embedded Device Endpoint 1/2 Data Registers (DE1D0-DE1D7)DE1TD7-DE

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor149 Advance Information — MC68HC(7)08KH12Section 10. Monitor ROM (MON)10.1 Cont

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor15 17.12 HUB Repeater Electrical Characteristics . . . . . . . . . . . . . . . .2

Advance Information MC68HC(7)08KH12 — Rev. 1.1150 Freescale Semiconductor10.3 FeaturesFeatures of the monitor ROM include the following:• Normal Use

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor151 Figure 10-1. Monitor Mode Circuit++++10MΩX1VDDVDD + VHIMC145407MC74HC12568HC7

Advance Information MC68HC(7)08KH12 — Rev. 1.1152 Freescale Semiconductor10.4.1 Entering Monitor ModeTable 10-1 shows the pin conditions for entering

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor153 When the host computer has completed downloading code into the MCU RAM, This

Advance Information MC68HC(7)08KH12 — Rev. 1.1154 Freescale Semiconductor10.4.2 Data FormatCommunication with the monitor ROM is in standard non-retu

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor155 10.4.4 Break SignalA start bit followed by nine low bits is a break signal. (

Advance Information MC68HC(7)08KH12 — Rev. 1.1156 Freescale SemiconductorTable 10-3. READ (Read Memory) CommandDescription Read byte from memoryOpera

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor157 Table 10-5. IREAD (Indexed Read) CommandDescription Read next 2 bytes in memo

Advance Information MC68HC(7)08KH12 — Rev. 1.1158 Freescale SemiconductorNOTE: A sequence of IREAD or IWRITE commands can sequentially access a block

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor159 10.4.6 Baud RateThe communication baud rate is controlled by crystal frequenc

Advance Information MC68HC(7)08KH12 — Rev. 1.116 Freescale Semiconductor

Advance Information MC68HC(7)08KH12 — Rev. 1.1160 Freescale Semiconductor

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor161 Advance Information — MC68HC(7)08KH12Section 11. Timer Interface Module (TIM

Advance Information MC68HC(7)08KH12 — Rev. 1.1162 Freescale Semiconductor11.2 IntroductionThis section describes the timer interface module (TIM2, V

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor163 11.4 Functional DescriptionFigure 11-1 shows the structure of the TIM. The c

Advance Information MC68HC(7)08KH12 — Rev. 1.1164 Freescale SemiconductorTable 11-1. TIM I/O Register SummaryAddr. Register Name Bit 7 6 5 4 3 2 1 Bi

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor165 11.4.1 TIM Counter PrescalerThe TIM clock source can be one of the seven pres

Advance Information MC68HC(7)08KH12 — Rev. 1.1166 Freescale Semiconductor11.4.3.1 Unbuffered Output CompareAny output compare channel can generate un

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor167 channel 0 registers initially controls the output on the PTE1/TCH0 pin. Writi

Advance Information MC68HC(7)08KH12 — Rev. 1.1168 Freescale SemiconductorFigure 11-2. PWM Period and Pulse WidthThe value in the TIM counter modulo r

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor169 write a new, smaller pulse width value may cause the compare to be missed. Th

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor17 Advance Information — MC68HC(7)08KH12List of FiguresFigure Title Page1-1 MCU B

Advance Information MC68HC(7)08KH12 — Rev. 1.1170 Freescale Semiconductorcontrol register (TSC1) is unused. While the MS0B bit is set, the channel 1

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor171 Setting MS0B links channels 0 and 1 and configures them for buffered PWM oper

Advance Information MC68HC(7)08KH12 — Rev. 1.1172 Freescale SemiconductorIf TIM functions are not required during wait mode, reduce power consumption

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor173 minimum TCLK pulse width, TCLKLMIN or TCLKHMIN, is:The maximum TCLK frequency

Advance Information MC68HC(7)08KH12 — Rev. 1.1174 Freescale Semiconductor• Resets the TIM counter• Prescales the TIM counter clockTOF — TIM Overflow

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor175 NOTE: Do not set the TSTOP bit before entering wait mode if the TIM is requir

Advance Information MC68HC(7)08KH12 — Rev. 1.1176 Freescale SemiconductorTCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clear

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor177 NOTE: Reset the TIM counter before writing to the TIM counter modulo register

Advance Information MC68HC(7)08KH12 — Rev. 1.1178 Freescale SemiconductorCHxF — Channel x Flag BitWhen channel x is an input capture channel, this re

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor179 MSxB — Mode Select Bit BThis read/write bit selects buffered output compare/P

Advance Information MC68HC(7)08KH12 — Rev. 1.118 Freescale SemiconductorFigure Title Page7-15 Wait Mode Entry Timing . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1180 Freescale SemiconductorNOTE: Before enabling a TIM channel register for input capture operation, ma

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor181 Figure 11-7. CHxMAX Latency11.9.5 TIM Channel Registers (TCH0H/L–TCH1H/L)Thes

Advance Information MC68HC(7)08KH12 — Rev. 1.1182 Freescale SemiconductorAddress: $0017 TCH0HBit 7654321Bit 0Read:Bit15 Bit14 Bit13 Bit12 Bit11 Bit10

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor183 Advance Information — MC68HC(7)08KH12Section 12. I/O Ports12.1 Contents12.2

Advance Information MC68HC(7)08KH12 — Rev. 1.1184 Freescale Semiconductor12.2 IntroductionForty-two bidirectional input-output (I/O) pins form five

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor185 $0007Data Direction Register D(DDRD)Read:DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2

Advance Information MC68HC(7)08KH12 — Rev. 1.1186 Freescale Semiconductor12.3 Port APort A is an 8-bit general-purpose bidirectional I/O port with s

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor187 DDRA[7:0] — Data Direction Register A BitsThese read/write bits control port

Advance Information MC68HC(7)08KH12 — Rev. 1.1188 Freescale Semiconductor12.4 Port BPort B is an 8-bit general-purpose bidirectional I/O port with s

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor189 12.4.2 Data Direction Register B (DDRB)Data direction register B determines w

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor19 Figure Title Page9-20 USB Embedded Device Endpoint 0 Data Register(UE0D0-UE0D7

Advance Information MC68HC(7)08KH12 — Rev. 1.1190 Freescale SemiconductorWhen bit DDRBx is a logic one, reading address $0001 reads the PTBx data lat

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor191 PTC[4:0] — Port C Data BitsThese read/write bits are software-programmable. D

Advance Information MC68HC(7)08KH12 — Rev. 1.1192 Freescale SemiconductorFigure 12-9. Port C I/O CircuitWhen bit DDRCx is a logic one, reading addres

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor193 12.6.1 Port D Data Register (PTD)The port D data register contains a data lat

Advance Information MC68HC(7)08KH12 — Rev. 1.1194 Freescale SemiconductorDDRD[7:0] — Data Direction Register D BitsThese read/write bits control port

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor195 12.7 Port EPort E is a 5-bit special function port that shares four of its p

Advance Information MC68HC(7)08KH12 — Rev. 1.1196 Freescale SemiconductorPTE[4:0] — Port E Data BitsPTE[4:0] are read/write, software-programmable bi

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor197 DDRE[4:0] — Data Direction Register E BitsThese read/write bits control port

Advance Information MC68HC(7)08KH12 — Rev. 1.1198 Freescale Semiconductor12.7.3 Port-E Optical Interface Enable RegisterPort E pins PTE3–PTE0, each h

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor199 XREF2–XREF0 — Reference Voltage Selection XThese bits sets the slicing refere

Advance Information MC68HC(7)08KH12 — Rev. 1.120 Freescale SemiconductorFigure Title Page12-20 Data Direction Register F (DDRF) . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.1200 Freescale SemiconductorFigure 12-17. Optical Interface Voltage ReferencesX-VREFVOLTAGE DIVIDERENABL

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor201 Figure 12-18. Port E Optical Coupling InterfacePTE0PORT LOGICPTE0OPTICALINTER

Advance Information MC68HC(7)08KH12 — Rev. 1.1202 Freescale Semiconductor12.8 Port FPort F is an 8-bit general-purpose bidirectional I/O port that s

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor203 12.8.2 Data Direction Register F (DDRF)Data direction register F determines w

Advance Information MC68HC(7)08KH12 — Rev. 1.1204 Freescale SemiconductorWhen bit DDRFx is a logic one, reading address $0009 reads the PTFx data lat

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor205 LDD — LED Direct Drive ControlThis read/write bit controls the output current

Advance Information MC68HC(7)08KH12 — Rev. 1.1206 Freescale Semiconductor

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor207 Advance Information — MC68HC(7)08KH12Section 13. Computer Operating Properly

Advance Information MC68HC(7)08KH12 — Rev. 1.1208 Freescale Semiconductor13.3 Functional DescriptionFigure 13-1 shows the structure of the COP modul

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor209 The COP counter is a free-running 6-bit counter preceded by the 12-bit SIM co

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor21 Advance Information — MC68HC(7)08KH12List of TablesTable Title Page2-1 Vector

Advance Information MC68HC(7)08KH12 — Rev. 1.1210 Freescale Semiconductor13.4.3 Power-On Reset The power-on reset (POR) circuit in the SIM clears the

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor211 COPRS — COP Rate Select BitCOPRS selects the COP timeout period. Reset clears

Advance Information MC68HC(7)08KH12 — Rev. 1.1212 Freescale Semiconductor13.8 Low-Power ModesThe WAIT and STOP instructions put the MCU in low-power

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor213 Advance Information — MC68HC(7)08KH12Section 14. External Interrupt (IRQ)14.

Advance Information MC68HC(7)08KH12 — Rev. 1.1214 Freescale Semiconductor14.4 Functional DescriptionA logic zero applied to the external interrupt p

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor215 Figure 14-1. IRQ Module Block Diagram14.4.1 IRQ1/VPP PinA logic zero on the I

Advance Information MC68HC(7)08KH12 — Rev. 1.1216 Freescale Semiconductor• Vector fetch or software clear — A vector fetch generates an interrupt ack

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor217 14.5 IRQ Module During Break InterruptsThe system integration module (SIM) c

Advance Information MC68HC(7)08KH12 — Rev. 1.1218 Freescale SemiconductorIRQF1 — IRQ1 FlagThis read-only status bit is high when the IRQ1 interrupt i

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor219 Advance Information — MC68HC(7)08KH12Section 15. Keyboard Interrupt Module (

Advance Information MC68HC(7)08KH12 — Rev. 1.122 Freescale SemiconductorTable Title Page12-1 I/O Port Register Summary...

Advance Information MC68HC(7)08KH12 — Rev. 1.1220 Freescale Semiconductor15.2 IntroductionThe keyboard module provides twenty independently maskable

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor221 Table 15-1. KBI I/O Register SummaryAddr. Register Name Bit 7 6 5 4 3 2 1 Bit

Advance Information MC68HC(7)08KH12 — Rev. 1.1222 Freescale Semiconductor15.4 Port-D Keyboard Interrupt Block DiagramFigure 15-1. Port-D Keyboard In

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor223 15.4.1 Port-D Keyboard Interrupt Functional DescriptionWriting to the KBDIE7–

Advance Information MC68HC(7)08KH12 — Rev. 1.1224 Freescale Semiconductor• Return of all enabled keyboard interrupt pins to logic 1 — As long as any

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor225 3. Write to the ACKD bit in the keyboard status and control register to clear

Advance Information MC68HC(7)08KH12 — Rev. 1.1226 Freescale SemiconductorKEYDF — Port-D Keyboard Flag BitThis read-only bit is set when a keyboard in

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor227 KBDIE7–KBDIE0 — Port-D Keyboard Interrupt Enable BitsEach of these read/write

Advance Information MC68HC(7)08KH12 — Rev. 1.1228 Freescale Semiconductor15.5 Port-E Keyboard Interrupt Block DiagramFigure 15-4. Port-E Keyboard In

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor229 15.5.1 Port-E Keyboard Interrupt Functional DescriptionWriting to the KBEIE3–

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor23 Advance Information — MC68HC(7)08KH12Section 1. General Description1.1 Conte

Advance Information MC68HC(7)08KH12 — Rev. 1.1230 Freescale Semiconductor• Return of all enabled keyboard interrupt pins to logic 1 — As long as any

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor231 4. Write to the ACKE bit in the keyboard status and control register to clear

Advance Information MC68HC(7)08KH12 — Rev. 1.1232 Freescale SemiconductorACKE — Port-E Keyboard Acknowledge BitWriting a logic 1 to this write-only b

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor233 KBEIE3–KBEIE0 — Port-E Keyboard Interrupt Enable BitsEach of these read/write

Advance Information MC68HC(7)08KH12 — Rev. 1.1234 Freescale Semiconductor15.6 Port-F Keyboard Interrupt Block DiagramFigure 15-7. Port-F Keyboard In

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor235 15.6.1 Port-F Keyboard Interrupt Functional DescriptionWriting to the KBFIE7–

Advance Information MC68HC(7)08KH12 — Rev. 1.1236 Freescale Semiconductor• Return of all enabled keyboard interrupt pins to logic 1 — As long as any

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor237 4. Write to the ACKF bit in the keyboard status and control register to clear

Advance Information MC68HC(7)08KH12 — Rev. 1.1238 Freescale SemiconductorACKF — Port-F Keyboard Acknowledge BitWriting a logic 1 to this write-only b

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor239 15.6.3.3 Port-F Pull-up Enable RegisterThe pulll-up enable register enables o

Advance Information MC68HC(7)08KH12 — Rev. 1.124 Freescale Semiconductor1.2 IntroductionThe MC68HC(7)08KH12 is a member of the low-cost, high-perfor

Advance Information MC68HC(7)08KH12 — Rev. 1.1240 Freescale Semiconductorthe break flag control register (BFCR) enables software to clear status bits

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor241 Advance Information — MC68HC(7)08KH12Section 16. Break Module (BREAK)16.1 C

Advance Information MC68HC(7)08KH12 — Rev. 1.1242 Freescale Semiconductor16.3 FeaturesFeatures of the break module include the following:• Accessibl

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor243 Figure 16-1. Break Module Block DiagramIAB[15:8]IAB[7:0]8-BIT COMPARATOR8-BIT

Advance Information MC68HC(7)08KH12 — Rev. 1.1244 Freescale Semiconductor16.4.1 Flag Protection During Break InterruptsThe system integration module

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor245 16.5.1 Break Status and Control Register (BRKSCR)The break status and control

Advance Information MC68HC(7)08KH12 — Rev. 1.1246 Freescale Semiconductor16.6 Low-Power ModesThe WAIT and STOP instructions put the MCU in low-power

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor247 Advance Information — MC68HC(7)08KH12Section 17. Preliminary Electrical Spec

Advance Information MC68HC(7)08KH12 — Rev. 1.1248 Freescale Semiconductor17.3 Absolute Maximum RatingsMaximum ratings are the extreme limits to whic

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor249 17.4 Functional Operating Range17.5 Thermal CharacteristicsCharacteristic S

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor25 • Full Universal Serial Bus Specification 1.1 Composite HUB with Embedded1 Fun

Advance Information MC68HC(7)08KH12 — Rev. 1.1250 Freescale Semiconductor17.6 DC Electrical CharacteristicsCharacteristic Symbol MinTyp(2)Max UnitOu

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor251 17.7 Control Timing17.8 Oscillator CharacteristicsCharacteristic Symbol Min

Advance Information MC68HC(7)08KH12 — Rev. 1.1252 Freescale Semiconductor17.9 USB DC Electrical CharacteristicsCharacteristic Symbol Conditions Min

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor253 17.10 USB Low Speed Source Electrical CharacteristicsCharacteristic SymbolCo

Advance Information MC68HC(7)08KH12 — Rev. 1.1254 Freescale Semiconductor17.11 USB High Speed Source Electrical CharacteristicsCharacteristic Symbol

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor255 17.12 HUB Repeater Electrical CharacteristicsLow Speed HUB Electrical Charac

Advance Information MC68HC(7)08KH12 — Rev. 1.1256 Freescale Semiconductor17.13 USB Signaling Levels17.14 TImer Interface Module CharacteristicsBus

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor257 17.15 Clock Generation Module Characteristics17.15.1 CGM Component Specifica

Advance Information MC68HC(7)08KH12 — Rev. 1.1258 Freescale Semiconductor17.15.3 Acquisition/Lock Time SpecificationsDescription Symbol Min Typ Max N

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor259 Advance Information — MC68HC(7)08KH12Section 18. Mechanical Specifications18

Advance Information MC68HC(7)08KH12 — Rev. 1.126 Freescale SemiconductorFeatures of the CPU08 include the following:• Enhanced HC05 Programming Model

Advance Information MC68HC(7)08KH12 — Rev. 1.1260 Freescale Semiconductor18.3 Plastic Quad Flat Pack (QFP)Figure 18-1. 64-Pin Quad-Flat-Pack (Case 8

How to Reach Us:Home Page:www.freescale.comE-mail:[email protected]/Europe or Locations Not Listed:Freescale SemiconductorTechnical Information

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor27 Figure 1-1. MCU Block DiagramDS Port 1➀ PORTS ARE SOFTWARE CONFIGURABLE WITH

Advance Information MC68HC(7)08KH12 — Rev. 1.128 Freescale Semiconductor1.5 Pin Assignments1.5.1 Quad Flat Pack (QFP) PackageFigure 1-2 Shows the 64

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor29 1.5.2 Power Supply Pins (VDDA, VSSA, VDD1, VSS1, VDD2, and VSS2)VDDA and VSSA

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor3 Advance Information — MC68HC(7)08KH12List of SectionsSection 1. General Descrip

Advance Information MC68HC(7)08KH12 — Rev. 1.130 Freescale Semiconductor1.5.3 Oscillator Pins (OSC1 and OSC2)The OSC1 and OSC2 pins are the connectio

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor31 1.5.8 Port A Input/Output (I/O) Pins (PTA7–PTA0)PTA7–PTA0 are general-purpose

Advance Information MC68HC(7)08KH12 — Rev. 1.132 Freescale Semiconductor1.5.13 Port F I/O Pins (PTF7/KBF7–PTF0/KBF0)PTF7/KBF7–PTF0/KBF0 are general-p

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor33 Advance Information — MC68HC(7)08KH12Section 2. Memory Map2.1 Contents2.2 In

Advance Information MC68HC(7)08KH12 — Rev. 1.134 Freescale Semiconductor$0000↓$005FI/O REGISTERS (80 BYTES)$0060↓$01DFRAM (384 BYTES)$01E0↓$CDFFUNIMP

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor35 2.3 I/O SectionAddresses $0000–$005F, shown in Figure 2-2, contain most of th

Advance Information MC68HC(7)08KH12 — Rev. 1.136 Freescale SemiconductorAddr. Name Bit 7654321Bit 0$0000 Port A Data Register (PTA)R:PTA7 PTA6 PTA5 P

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor37 $0010TIM Status and Control Register(TSC)R: TOFTOIE TSTOP00PS2 PS1 PS0W: 0 TRS

Advance Information MC68HC(7)08KH12 — Rev. 1.138 Freescale Semiconductor$0020USB Embedded Device Endpoint 0Data Register 0 (DE0D0)R: DE0R07 DE0R06 DE

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor39 $0030USB HUB Endpoint 0 DataRegister 0 (HE0D0)R: HE0R07 HE0R06 HE0R05 HE0R04 H

Advance Information MC68HC(7)08KH12 — Rev. 1.14 Freescale Semiconductor

Advance Information MC68HC(7)08KH12 — Rev. 1.140 Freescale Semiconductor$0040Port F Keyboard Status and ControlRegister (KBFSCR)R:0000KEYFF 0IMASKF M

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor41 $0050 UnimplementedR:W:$0051USB HUB Downstream Port 1Control Register (HDP1CR)

Advance Information MC68HC(7)08KH12 — Rev. 1.142 Freescale Semiconductor$FE00Break Status Register(BSR)R:RRRRRRSBSW RW:$FE01Reset Status Register(RSR

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor43 Table 2-1 is a list of vector locations. 2.4 Monitor ROMThe 240 bytes at addr

Advance Information MC68HC(7)08KH12 — Rev. 1.144 Freescale Semiconductor

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor45 Advance Information — MC68HC(7)08KH12Section 3. Random-Access Memory (RAM)3.1

Advance Information MC68HC(7)08KH12 — Rev. 1.146 Freescale SemiconductorDuring a subroutine call, the CPU uses two bytes of the stack to store the re

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor47 Advance Information — MC68HC(7)08KH12Section 4. Read-Only Memory (ROM)4.1 Co

Advance Information MC68HC(7)08KH12 — Rev. 1.148 Freescale Semiconductor

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor49 Advance Information — MC68HC(7)08KH12Section 5. Configuration Register (CONFI

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor5 Advance Information — MC68HC(7)08KH12Table of ContentsGeneral Description1.1 Co

Advance Information MC68HC(7)08KH12 — Rev. 1.150 Freescale SemiconductorNOTE: The CONFIG register is a special register containing one-time writable

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor51 Advance Information — MC68HC(7)08KH12Section 6. Central Processor Unit (CPU)6

Advance Information MC68HC(7)08KH12 — Rev. 1.152 Freescale Semiconductor6.3 FeaturesFeatures of the CPU include the following:• Full Upward, Object-

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor53 Figure 6-1. CPU Registers6.4.1 Accumulator (A)The accumulator is a general-pur

Advance Information MC68HC(7)08KH12 — Rev. 1.154 Freescale Semiconductor6.4.2 Index Register (H:X)The 16-bit index register allows indexed addressing

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor55 6.4.3 Stack Pointer (SP)The stack pointer is a 16-bit register that contains t

Advance Information MC68HC(7)08KH12 — Rev. 1.156 Freescale Semiconductor6.4.4 Program Counter (PC)The program counter is a 16-bit register that conta

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor57 6.4.5 Condition Code Register (CCR)The 8-bit condition code register contains

Advance Information MC68HC(7)08KH12 — Rev. 1.158 Freescale SemiconductorI — Interrupt MaskWhen the interrupt mask is set, all maskable CPU interrupts

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor59 C — Carry/Borrow FlagThe CPU sets the carry/borrow flag when an addition opera

Advance Information MC68HC(7)08KH12 — Rev. 1.16 Freescale Semiconductor2.3 I/O Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.160 Freescale Semiconductor

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor61 Advance Information — MC68HC(7)08KH12Section 7. System Integration Module (SI

Advance Information MC68HC(7)08KH12 — Rev. 1.162 Freescale Semiconductor7.7 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor63 Figure 7-1. SIM Block DiagramSTOP/WAITCLOCKCONTROLCLOCK GENERATORSPOR CONTROLR

Advance Information MC68HC(7)08KH12 — Rev. 1.164 Freescale SemiconductorAddr. Register Name Bit 7 6 5 4 3 2 1 Bit 0$FE00Break Status Register(BSR)Rea

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor65 Table 7-1 shows the internal signal names used in this section.7.3 SIM Bus Cl

Advance Information MC68HC(7)08KH12 — Rev. 1.166 Freescale Semiconductor7.3.2 Clock Start-Up from POR When the power-on reset module generates a rese

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor67 An internal reset clears the SIM counter (see 7.5 SIM Counter), but an externa

Advance Information MC68HC(7)08KH12 — Rev. 1.168 Freescale SemiconductorFigure 7-5. Internal Reset TimingThe COP reset is asynchronous to the bus clo

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor69 Figure 7-7. POR Recovery7.4.2.2 Computer Operating Properly (COP) ResetAn inpu

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor7 Section 7. System Integration Module (SIM)7.1 Contents . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.170 Freescale Semiconductor7.4.2.3 Illegal Opcode ResetThe SIM decodes signals from the CPU to detect il

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor71 7.5 SIM CounterThe SIM counter is used by the power-on reset module (POR) and

Advance Information MC68HC(7)08KH12 — Rev. 1.172 Freescale Semiconductor7.6 Exception ControlNormal, sequential program execution can be changed in

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor73 Figure 7-8. Interrupt ProcessingNONONOYESNONOYESNOYESYESFROM RESETBREAKI BIT S

Advance Information MC68HC(7)08KH12 — Rev. 1.174 Freescale SemiconductorAt the beginning of an interrupt, the CPU saves the CPU register contents on

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor75 set, the SIM proceeds with interrupt processing; otherwise, the next instructi

Advance Information MC68HC(7)08KH12 — Rev. 1.176 Freescale Semiconductor7.6.1.2 SWI InstructionThe SWI instruction is a non-maskable instruction that

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor77 7.6.2.1 Interrupt Status Register 1IF6–IF1 — Interrupt Flags 1–6These flags in

Advance Information MC68HC(7)08KH12 — Rev. 1.178 Freescale Semiconductor7.6.2.2 Interrupt Status Register 2IF11–IF7 — Interrupt Flags 11–7These flags

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor79 7.6.3 ResetAll reset sources always have equal and highest priority and cannot

Advance Information MC68HC(7)08KH12 — Rev. 1.18 Freescale Semiconductor7.8.2 Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.180 Freescale Semiconductorbelow. Both STOP and WAIT clear the interrupt mask (I) in the condition code

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor81 Figure 7-16. Wait Recovery from Interrupt or BreakFigure 7-17. Wait Recovery f

Advance Information MC68HC(7)08KH12 — Rev. 1.182 Freescale SemiconductorA break interrupt during stop mode sets the SIM break stop/wait bit (SBSW) in

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor83 7.8 SIM RegistersThe SIM has three memory mapped registers. Table 7-4 shows t

Advance Information MC68HC(7)08KH12 — Rev. 1.184 Freescale Semiconductor7.8.2 Reset Status Register (RSR)This register contains six flags that show t

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor85 POR — Power-On Reset Bit1 = Last reset caused by POR circuit0 = Read of RSRPIN

Advance Information MC68HC(7)08KH12 — Rev. 1.186 Freescale SemiconductorBCFE — Break Clear Flag Enable BitThis read/write bit enables software to cle

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor87 Advance Information — MC68HC(7)08KH12Section 8. Clock Generator Module (CGM)8

Advance Information MC68HC(7)08KH12 — Rev. 1.188 Freescale Semiconductor8.6.4 PLL Reference Divider Select Register (PRDS) . . . . . . . .1068.7 Inte

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor89 8.3 FeaturesFeatures of the CGM include:• VCO Center-Of-Range Frequuency tune

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor9 8.7 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Advance Information MC68HC(7)08KH12 — Rev. 1.190 Freescale SemiconductorFigure 8-1. CGM Block DiagramBCSPHASEDETECTORLOOPFILTERFREQUENCYDIVIDERVOLTAG

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor91 8.4.1 Crystal Oscillator CircuitThe crystal oscillator circuit consists of an

Advance Information MC68HC(7)08KH12 — Rev. 1.192 Freescale SemiconductorThe operating range of the VCO is programmable for a wide range of frequencie

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor93 8.4.4 Acquisition and Tracking ModesThe PLL filter is manually or automaticall

Advance Information MC68HC(7)08KH12 — Rev. 1.194 Freescale Semiconductornoise hit and the software must take appropriate action, depending on the app

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor95 2. Choose a practical PLL (crystal) reference frequency, fRCLK, and the refere

Advance Information MC68HC(7)08KH12 — Rev. 1.196 Freescale SemiconductorA zero value for R or N is interpreted exactly the same as a value of one. A

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor97 • Tuning capacitor, C2 (can also be a fixed capacitor)• Feedback resistor, RB•

Advance Information MC68HC(7)08KH12 — Rev. 1.198 Freescale Semiconductor8.5 I/O SignalsThe following paragraphs describe the CGM I/O signals.8.5.1 C

MC68HC(7)08KH12 — Rev. 1.1 Advance InformationFreescale Semiconductor99 8.5.6 Buffered Crystal Clock Output (CGMVOUT)CGMVOUT buffers the OSC1 clock fo